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ASIC Engineer Internship - Physical Design

MetaBangalore
Internship
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Deadline: 12/11/2026
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About the role

Meta is hiring for the role of ASIC Engineer Intern, Physical Design!

Responsibilities of the Candidate:

- Participate in Design Implementation, Physical Design, and Design Power activities and provide feedback - Contribute to optimizing RTL for some of the IPs to achieve best in class PPA (Power, Performance, Area), and support implementation and physical design of the same. - Contribute to develop unique recipes to achieve the best PPA using various physical design strategies. - Develop scripts, tools, and methods to enhance PPA (Power, Performance, Area). - Support and develop EDA infrastructure, and help improve design productivity.

Experience with High Performance Computing

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Experience with Digital Design Techniques

- Creativity and problem solving capabilities

Requirements

- Currently has, or is in the process of obtaining, a Bachelor's degree in Electrical Engineering, Computer Engineering or related engineering fields - Knowledge of Computer Architecture, Logic Design and Device Physics fundamentals - Knowledge of Verilog, System verilog - Must obtain work authorization in the country of employment at the time of hire and maintain ongoing work authorization during employment - Intent to return to degree-program after the completion of the internship - Currently has, or is in the process of obtaining, a Masters or PhD degree in Electrical Engineering, Computer Engineering or related engineering fields - Experience with Synthesis and Physical Design flows and methodologies - Scripting capability with TCL and Python -

Skills for this role

Skills we detected for this role.

  • Python
  • Verilog / VHDL