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ASIC Validation Engineer

QualcommBangalore
Job

Posted 12 Nov

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Deadline: 26/11/2026
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About the role

Qualcomm is hiring for the role of ASIC Validation Engineer!

Responsibilities of the Candidate:

  • Develop low-level drivers, bootloaders, BSPs, middleware, and application firmware.
  • Work closely with hardware,RTL and DV engineers to develop and debug.
  • Lead post-silicon bring-up and validation of given module of ASIC/SoC products.
  • Drive debug and root-cause analysis of silicon, firmware, and system-level issues.
  • Develop firmware and low-level software required for silicon bring-up, subsystem enablement, and debug.
  • Debug complex hardware-software integration issues using oscilloscopes, logic analyzers, protocol analyzers, JTAG/SWD debuggers, and other laboratory equipment.
  • Analyze protocol traces, link training behavior, LTSSM states, error logs, and performance bottlenecks.
  • Develop production-quality software, including testing, documentation, static analysis, and CI/CD/CT
  • Develop Python-based automation frameworks for validation and regression testing.
  • Interacting with hardware, software and other teams to validate SoCs with minimum delays

Requirements

  • Strong programming skills in C and C++ for resource-constrained systems
  • Proficient in Python programming
  • Excellent knowledge in low level firmware/ baremetal HW/IP driver writing.
  • Root-cause analysis of silicon failures abd Hardware debug and failure isolation
  • Performance characterization and Power and thermal validation
  • In-depth understanding of the HW is must
  • Should have exposure to Hardware initialization, Validation diagnostics development and firmware optimisations
  • Good knowledge of how to use embedded development tools such as JTAG and associated debug tools
  • Work experience on ARM Cortex platform/ MIPS/RISC-V cpus.
  • Work Experience with FPGAs based platforms is plus
  • Should have good knowledge of System software stack,  Power Management, High speed peripherals, USB, SDIO,Ethernet,PCIe etc and memory subsystem like DDR/LPDDR etc.
  • Exposure to PCIe Gen4/Gen5/Gen6,25G/50G/100G/200G/400G Ethernet,CXL,DDR4/DDR5/LPDDR,SerDes,UCIe interface validation
  • Familiarity with software configuration management tools, defect tracking tools, and peer review.
  • Work Experience with FPGAs based platforms is plus
  • Work experience on Heterogeneous and Multiprocessor SoC platforms.
  • Exposure to Pre-Silicon environment with RTL Co-Simulations is plus point
  • Experience with development environments such as Linux, Git, Jira and Confluence
  • Strong communication skills to exchange ideas and work as a team

Skills for this role

Skills we detected for this role.

  • Python
  • C++
  • Git
  • CI/CD
  • Linux
  • Jira
  • Confluence