Altera

Junior Verification Engineer

We're looking for talented, self-motivated engineers to join our Design Verification (DV) team in a junior or mid-level position.

HW and DSP Graduate Intern

Final year or Graduate student in Electrical/Computer Engineering or Communications. Knowledge on Wireless communications, FPGA implementation, HW/RTL coding, Matlab simulation, and Digital Signal Processing are a plus.

High Level Synthesis (HLS) Compiler Engineer (Intern))

Undergrad Intern Technical

IP Design PEY Intern

Join Altera IP solutions team and work on cutting edge FPGA RTL and IP design!

Embedded Soft IP Intern

As an Embedded Soft IP intern in the Software, IP and Solutions (SIPS) group, you will work closely with the engineering team to design, verify and release RTL based IPs into Quartus as well as embedded reference…

Internship – FPGA Hardware Design Engineer

As an FPGA Hardware Design Intern, you'll work alongside industry experts in an Agile environment, gaining hands-on experience in hardware and software co-design.

Internship – FPGA Software Design Engineer

As an FPGA Software Design Intern, you'll develop embedded software, DevOps solutions, and data visualization tools that bring FPGA technology to life.

Software Engineer - Factory Apps - Intern

The Factory Applications team helps developers make effective use of Altera's FPGA design tools and workflows, including FPGA AI Suite, High Level Synthesis (HLS), and DSP Builder.

FPGA Development Tools - Intern

FPGA Design Verification Intern

Altera is responsible for High-Speed Protocol IP development, which includes participating in high-level product specifications, logic/RTL design and implementation, RTL verification, IP FPGA validation and debugging.

Software Engineer - Intern

In this role you will be developing the software for Quartus tool that programs the next generation of FPGA devices.